Host controlled hybrid storage device

ABSTRACT

A host based caching technique may be used to determine caching policies for a hybrid hard disk drive. Because the host based caching may make use of knowledge about what data is being cached, improved performance may be achieved in some cases.

CROSS-REFERENCE TO RELATED APPLICATIONS

This is a continuation application based on application Ser. No.15/004,162 filed Jan. 22, 2016, which in turn is based on applicationSer. No. 13/993,170 filed Jun. 11, 2013, which in turn is a 35 USCSection 371 National Phase filing of Application No. PCT/US11/55622filed Oct. 10, 2011. This application claims the benefit of priority ofthese applications.

BACKGROUND

This relates generally to controlling storage devices forprocessor-based systems.

Some storage devices have relatively fast access times and lower storagecapacities, while other storage devices have slower access time andhigher storage capacities. Since sometimes fast access is needed andother times large storage capacity is needed, it is advantageous to haveone storage device that has both capabilities. Hybrid hard disks combinea small portion of solid state media and less expensive magnetic basedmedia in one integrated unit. However, the performance of these devicesmay be limited. It would be advantageous to provide combined storagedevices that have better performance.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic depiction of one embodiment of the presentinvention;

FIG. 2 is a schematic depiction of another embodiment of the presentinvention;

FIG. 3 is a schematic depiction of another embodiment of the presentinvention;

FIG. 4 is a flow chart for one embodiment of the present invention;

FIG. 5 is a flow chart for another embodiment of the present invention;and

FIG. 6 is a flow chart for still another embodiment of the presentinvention.

DETAILED DESCRIPTION

The performance of hybrid hard disks may be limited to the effectivenessof logical block address only based caching because the device only hasknowledge of the logical block addresses and no additional information,such as priority of the request or file system information. However,host software based non-volatile storage input/output caching techniqueshave knowledge of input/output priority, file types, processinformation, and other data to determine caching policies, and use thisenhanced information together with discrete hard disk and solid statecache devices.

For current designs, with different types of memory in the same package,there is no method for passing enhanced information to the solid statecache media. Instead, only the host system software or drivers hasaccess to this “extra data”. In some embodiments, the host softwaredrivers may use this richer information to control the various mediatypes of a hybrid storage device. A hybrid storage device may includeNAND flash memory, a future high speed non-volatile memory type, and/ora magnetic memory, to mention a few examples. In some cases, powersavings and/or performance advantages may be achieved.

Referring to FIG. 1, in accordance with one embodiment, a host system 10may include one or more processors 12 coupled over a suitable connection16 to a system memory 18, including dynamic random access memory (DRAM).Caching software 14 may be executed by the processors 12. The processors12, in one embodiment, may be coupled by a connection 20 to a chipset,including a peripheral component hub (PCH) 22. The peripheral componenthub 22 may include a host storage controller 24. The architecture shownin FIG. 1 is only one example of a system architecture.

The host storage controller 24 may be coupled by a bus, such as a SerialAdvanced Technology Attachment (SATA) bus 26 to a hybrid hard disk drive28. The hybrid hard disk drive may be one package that includes a phasechange memory and/or a NAND flash media 30, coupled over an internaldata transfer bus 34 to a rotating media hard disk drive 32. Othercombinations of semiconductor and magnetic memory may also be used.

In some embodiments, the drive 28 may be a processor or controller basedsystem capable of executing instructions.

The hybrid hard disk drive is plugged into the host chipset over aninterface, such as SATA, that may be controlled, in one embodiment byIntel's Smart Response Technology software, acting as the cachingsoftware 14. The software 14 uses host based caching mechanisms todirect system input/output to various physical media regions on thehybrid hard disk drive 28.

Most frequently used data may be directed and stored on the fastestmedia portion of the hybrid hard disk drive, which acts as a cache forthe slower storage. If one of the storages becomes filled, the software14 instructs the hybrid hard disk drive to move data from one region toanother, via internal instructions, in order to avoid host memorymovement, in some embodiments. The host software 14 can provide a bettercaching solution than a hard disk drive that does not have real timehost knowledge and the richness of information needed to effectivelycontrol the two types of media within the storage device.

Particularly, relying on logical block addressing only based informationand making cache insertion and eviction decisions based upon thislimited data and simple algorithms, such as least recently usedalgorithms, can result in cache thrashing. In cache thrashing, lowerpriority data evicts higher priority data and/or reduced performance mayresult. By providing more information, this type of thrashing orperformance hit can be lessened.

In another embodiment, physically separate devices, such as the devices30 and 32, may be used. When the two devices are physically separate,the host software has the ability to directly control the content ofcache with advanced algorithms, making use of rich information. However,two physically separate devices may take on additional complexity ofhandling the physical separation and necessary data synchronization.

By providing information about file types and process priority, the hostcan make decisions based on which logical addresses are touched. Thismore informed decision can lead to increased performance in someembodiments.

Allowing the host to control the mechanisms that place data either inthe faster solid state media area or the magnetic slower media area of ahybrid storage device may lead to better performance and lower powerconsumption in some cases. This is because the host may be aware of theadditional information associated with inputs/outputs destined for thedevice and can make more intelligent caching decisions as a result.Thus, the host can control the placement of incoming input and outputdata within the storage.

In some embodiments, the hybrid hard disk drive 28 directly exposes thetotal media size and region information to the host for all media types.Then the host can directly access the multimedia type areas on the diskvia standard command sets. Each media type area is a continuous logicaladdress subset of the total logical address range exposed to the host inone embodiment.

Alternately, in some embodiments, the host may issue negative logicalblock addresses of the magnetic or slower media area as an explicitindication that the request is to be cached in the fast solid statemedia area. The incoming logical block address from the host request issign inverted and sent to the device 28. As another example, a separateindicator in the command may denote a cache this request or a do notcache this request. The negative logical block address region in thefast media may have a one-to-one relationship with the slower mediabacking storage region. In this way, the faster media region can serveas a write-back cache for the slower media.

The drive 28 may also accept a command that moves data between thevarious media types within the drive itself, thereby saving datamovement to and from the host. In some embodiments, a mechanism to flushall data from one media type area to the magnetic or slower media typearea can be provided. This mechanism may be manually invoked bysoftware, but may also be invoked by the device automatically duringinitialization when connected to a system that does not have the cachingsoftware 14. In this way, the storage device presents the latest copy ofdata to the system, whether or not the caching software is present. Aninitiation command received from the host during initial deviceenumeration indicates the host intends to explicitly manage the mediaarea types and prevents the global flush from occurring. The device maybe configured to automatically flush if this initiation command is notreceived from the host within a certain period of time upon power-up. Asanother example, automatic flush may occur if the first command afterpower up is something other than the initiation command.

Another embodiment, shown in FIG. 2, differs in that the hybrid storagedevice 28 includes only solid state media, such as a future high speednon-volatile memory type 30 and NAND media 32.

The embodiment of FIG. 3 differs in that a separate power line 36 isprovided to the hybrid hard disk drive 28. In addition, the hybrid harddisk drive 28 has switches 38 and 40 for cutting power to the media 30and/or the media 32.

Referring to FIG. 4, the input/output handler may be implemented insoftware, hardware, and/or firmware. In software and firmwareembodiments, the sequence may be implemented by computer executedinstructions stored in a non-transitory computer readable medium, suchas a semiconductor, magnetic, or optical storage. For example, thesequence of FIG. 4 could be stored as part of the caching software 14 inthe system memory 18, in one embodiment.

Initially, a check at diamond 42 determines whether an access is to thesolid state region. If so, the logical to physical addresses aretranslated for the solid state device, as indicated in block 44.Otherwise, the logical to physical addresses are translated for themagnetic or second storage device, as indicated in block 46.

Referring next to FIG. 5, the flush sequence 50 may be implemented inhardware, software, and/or firmware. In software and firmwareembodiments, the sequence may be implemented in computer executedinstructions stored in a non-transitory computer readable medium, suchas an optical, magnetic, or semiconductor storage. In one embodiment,the sequence of FIG. 5 may be part of a caching software 14 that may,for example, be stored in the system memory 18. In another embodiment,the sequence 50 may be implemented by the drive 28 itself.

A check at diamond 52 determines whether the device 28 has been moved toa new system. If the device 28 has been moved to a new system, a checkat diamond 54 determines whether it supports cache control from the hostof the two different types of storage. If so, the flow continues.Otherwise, the cache may be flushed to magnetic media, as determined inblock 56.

Moving to FIG. 6, a spindle shutoff sequence 60 may be used to reducepower consumption, in some embodiments. The sequence may be implementedin hardware, software, and/or firmware. In software and firmwareembodiments, the sequence may be implemented by computer executedinstructions stored in a non-transitory computer readable medium, suchas an optical, magnetic, or semiconductor storage. In one embodiment,the sequence 60 may be part of the caching software 14 stored in thesystem memory 18. In another embodiment, the sequence 60 may beimplemented by the drive 28 itself.

A check at diamond 62 determines whether the system is operating out ofthe cache. If so, a check at diamond 64 determines whether the variableCacheTime, which represents the amount of time it has been operating outof the cache, is greater than a variable spindle_inactive_timer, whichgives a threshold value for when the timer should be shut off. IfCacheTime is greater than this threshold value, as determined in diamond64, power to the spindle may be gated (block 66), for example using theswitch 40, shown in FIG. 3.

Software pseudo code for one embodiment is as follows:

// host software incoming I/O handler // support for negative LBAcaching on Hybrid Device if (hostCachingPolicy(cmd) == solidState) {  // 2s complement LBA and issue IO so it goes to NAND   LBA = −LBA;  // issue IO   issueIO(cmd, LBA); } else if (hostCachingPolicy(cmd) ==magneticMedia) {   // issue normally to backing store   issueIO(cmd,LBA); } Or // host software incoming I/O handler // support for managingdiffering media areas if (hostCachingPolicy(cmd) == solidState) {   //translate the logical to physical address for the device's solid state  area   LBA = L2P(solidStateArea);   // issue IO   issueIO(cmd, LBA); }else if (hostCachingPolicy(cmd)== magneticMedia) {   // translate thelogical to physical address for the device's magnetic   area   LBA =L2P(magneticArea);   // issueIO   issueIO(cmd, LBA); }

Flushing code: // if the user wants to move this device to a system thatdoes not support host controlled // Hybrid mechanisms then the solidstate area should be flushed to the // backing store i.e. magnetic mediaif (driverWillBeMoved( ) == TRUE) {   issueIO(flushSolidStateArea,NULL); } Initialization code: // If the host supports explicit controlof the Hybrid mechanisms, then send // the “Init” command to preventautomatic flushing if (driverSupportsExplicitCacheControl( ) == TRUE) {  issueIO(initCommand, NULL); }Moving data from one media type area to another

if (evictData == TRUE) {   // evict data from solid state area tobacking store (i.e. magnetic   media)   // moves data from negative LBAto real LBA on backing store   issueIO(moveData, −LBA); } else if(populateData == TRUE) {   // populate data to solid state area frombacking store (i.e. magnetic   media)   issueIo(moveData, LBA); }

References throughout this specification to “one embodiment” or “anembodiment” mean that a particular feature, structure, or characteristicdescribed in connection with the embodiment is included in at least oneimplementation encompassed within the present invention. Thus,appearances of the phrase “one embodiment” or “in an embodiment” are notnecessarily referring to the same embodiment. Furthermore, theparticular features, structures, or characteristics may be instituted inother suitable forms other than the particular embodiment illustratedand all such forms may be encompassed within the claims of the presentapplication.

While the present invention has been described with respect to a limitednumber of embodiments, those skilled in the art will appreciate numerousmodifications and variations therefrom. It is intended that the appendedclaims cover all such modifications and variations as fall within thetrue spirit and scope of this present invention.

1-30. (canceled)
 31. An apparatus, comprising: a storage controller toaccess a first nonvolatile storage device and a second nonvolatilestorage device as a single drive having a capacity of a combination of acapacity of the first nonvolatile storage device and a capacity of thesecond nonvolatile storage device, the first nonvolatile storage deviceto have less capacity and faster access time as compared to the secondnonvolatile storage device; and a host processor to execute cachingcontrol to read and write directly to the first nonvolatile storagedevice and move data between the first nonvolatile storage device andthe second nonvolatile storage device depending on frequency of accessof the data.
 32. The apparatus of claim 31, wherein the firstnonvolatile storage device comprises flash memory and the secondnonvolatile storage device comprises a rotating magnetic memory.
 33. Theapparatus of claim 31, wherein the first nonvolatile storage devicecomprises phase change memory and the second nonvolatile storage devicecomprises flash memory.
 34. The apparatus of claim 31, wherein thestorage controller comprises part of a peripheral component controlchipset.
 35. The apparatus of claim 31, wherein the caching control isto determine whether to transfer data from the first nonvolatile storagedevice to the second nonvolatile storage device based on a file type ofthe data.
 36. The apparatus of claim 31, wherein the caching control isto provide information about data for host directed storage to cause thefirst and second nonvolatile storage device to selectively store data.37. The apparatus of claim 36, wherein the caching control is to providean explicit indication with a logical block address (LBA) to keep theLBA in the first nonvolatile storage device.
 38. A system comprising: acombined storage device including a first nonvolatile storage device anda second nonvolatile storage device as a single drive having a capacityof a combination of a capacity of the first nonvolatile storage deviceand a capacity of the second nonvolatile storage device, the firstnonvolatile storage device to have less capacity and faster access timeas compared to the second nonvolatile storage device; a storagecontroller to access the combined storage device; and a host processorto execute caching control to read and write directly to the firstnonvolatile storage device and move data between the first nonvolatilestorage device and the second nonvolatile storage device depending onfrequency of access of the data.
 39. The system of claim 38, wherein thefirst nonvolatile storage device comprises flash memory and the secondnonvolatile storage device comprises a rotating magnetic memory.
 40. Thesystem of claim 38, wherein the first nonvolatile storage devicecomprises phase change memory and the second nonvolatile storage devicecomprises flash memory.
 41. The system of claim 38, wherein the storagecontroller comprises part of a peripheral component control chipset. 42.The system of claim 38, wherein the caching control is to determinewhether to transfer data from the first nonvolatile storage device tothe second nonvolatile storage device based on a file type of the data.43. The system of claim 38, wherein the caching control is to provideinformation about data for host directed storage to cause the first andsecond nonvolatile storage device to selectively store data.
 44. Thesystem of claim 43, wherein the caching control is to provide anexplicit indication with a logical block address (LBA) to keep the LBAin the first nonvolatile storage device.
 45. The system of claim 38,wherein the host processor comprises a multicore processor, at least onecore of the processor to access data of the combined storage device; or,further comprising a network adapter coupled to exchange data betweenthe combined storage device and a remote network location; or furthercomprising a display communicatively coupled to the processor.
 46. Amethod comprising: reading and writing data directly to a firstnonvolatile storage device of a combined storage device having the firstnonvolatile storage device and a second nonvolatile storage device as asingle drive having a capacity of a combination of a capacity of thefirst nonvolatile storage device and a capacity of the secondnonvolatile storage device, the first nonvolatile storage device to haveless capacity and faster access time as compared to the secondnonvolatile storage device; and controlling, with software executing ona host processor, movement of the data between the first nonvolatilestorage device and the second nonvolatile storage device depending onfrequency of access of the data.
 47. The method of claim 46, wherein thefirst nonvolatile storage device comprises flash memory and the secondnonvolatile storage device comprises a rotating magnetic memory.
 48. Themethod of claim 46, wherein the first nonvolatile storage devicecomprises phase change memory and the second nonvolatile storage devicecomprises flash memory.
 49. The method of claim 46, wherein the storagecontroller comprises part of a peripheral component control chipset. 50.The method of claim 46, wherein controlling movement of the datacomprises determining whether to transfer data from the firstnonvolatile storage device to the second nonvolatile storage devicebased on a file type of the data.